1. Field of the Invention
The present invention relates generally to an embedded logic analyzer, and particularly to a programmable embedded logic analyzer for analyzing an electronic circuit.
2. Description of the Related Art
A logic analyzer is an electronic instrument that is used to capture and display data signals of an electronic circuit. Generally, the logic analyzer captures the data signals that are too fast to be observed by a user. The user observes the data signals captured by the logic analyzer to effectively analyze the electronic circuit and to take preemptive actions or to debug based on the analysis.
Logic Analyzers may be broadly classified as external logic analyzers and embedded logic analyzers. The embedded logic analyzer is generally included within a programmable logic device or an integrated circuit (IC), e.g., a complex programmable logic device (CPLD), field programmable gate array (FPGA), application specific integrated circuit (ASIC), etc. The embedded logic analyzer has the ability to capture large amounts of high speed data signals within the IC.
The embedded logic analyzer may include a memory to store the captured data signals. Usually, the embedded logic analyzer is programmable to capture and store the data signals specified by the user. The data signals stored by the embedded logic analyzer may be transferred to a computer for further analysis. The data signals are generally transferred to the computer through an interface provided on the IC.
FIG. 1 is a block diagram of a conventional embedded logic analyzer (ELA) 100 included within an integrated circuit (not shown). The ELA 100 includes an interconnect module 110 to receive a plurality of data signals within the integrated circuit. The interconnect module 110 is programmable to select a plurality of signals to be sampled and at least one trigger signal to enable sampling from the plurality of received signals. The at least one trigger signal is transferred to a trigger module 120. The trigger module 120 is programmable to set a trigger condition and to detect if the at least one trigger signal satisfies the trigger condition. If the trigger condition is satisfied, the trigger module 120 initiates a sampling process. Upon the initiation of the sampling process, a memory controller 130 starts sampling the plurality of signals to be sampled from the interconnect module 110. The sampled signals may be stored in a memory 140 for further analysis. Therefore, the ELA 100 operates to execute a general code given below:IF (<TRIGGER CONDITION>) THEN (SAMPLE SIGNALS(X)),wherein the TRIGGER CONDITION is any logical operation or a series of logical operations and the SIGNALS (X) are the plurality of signals to be sampled from the interconnect module 110. According to the code executed by the ELA 100, when the trigger condition is satisfied, the ELA 100 samples at least one sampled signal and stores the sampled signal in the memory 140. Once signals are captured by the logic analyzer, they may be provided to a test system for analysis.
In order to provide useful insight into a system, an ELA, such as ELA 100, desirably has a lot of information available to it for capture. This means that ELA 100 typically has many signals connected to it inside of the IC in which ELA 100 is located. The circuitry of interconnect module 110 can grow exponentially in size as the number of inputs thereto increases. The majority of the gates that make up the circuitry of ELA 100 may be made up of interconnect module 110. In addition, the routing congestion from having a large number of signals routed to ELA 100 alone can make the IC containing ELA 100 either unroutable or cause the size and therefore manufacturing cost of the IC to undesirably substantially increase. The size requirements for getting the desired amount of information to ELA 100 for selection thereby could increase the overall cost of the IC to unreasonable levels.
It is desirable, then, to effectively provide more signals than provided to an ELA by conventional ELA techniques.